Multi-Carrier GSM with State of the Art ADC technology

© 2006 Brad Brannon, Analog Devices, Inc.

May 10, 2006 (contact by email for latest product info)

ADI currently has a number of 14+ bit converters in the 80 to 125(+) MSPS range.  These offer a variety of performance optimizations from baseband (low IF) to high IF’s (up to 225 MHz).  The table below shows a number of these converters’ noise spectral density and spurious performance.  The tables below assume an input termination of 200 ohms differential. 

(typicals)

AD9246[1]

AD9445[2]

AD9446[3]

AD6645[5]

AD9245[6]

AD9244

BB SNR

-145.7 dBm/Hz

-147.2 dBm/Hz

-149.1

dBm/Hz

-148.2 dBm/Hz

-143.8 dBm/Hz

-144.8 dBm/Hz

BB SFDR

90 dBc

95 dBc

92 dBc

93 dBc

83 dBc

94.5 dBc

70M SNR

-145.5 dBm/Hz

147.2 dBm/Hz

-148.4 dBm/Hz

-146.7 dBm/Hz

-142.8 dBm/Hz

-143.3 dBm/Hz

70M SFDR

85 dBc

90 dBc

89 dBc

89 dBc

81.6

84.1

225M SNR

-143.7

-145.8 dBm/Hz

na

145.2 dBm/Hz

na

-138.3 dBm/Hz

225M SFDR

80 dBc

88 dBc

na

63.5 dBc

na

60.7

 

 

 

 

 

 

 

 

 

Sample Rate

Multi-carriers may be received over up to 60 MHz.  Therefore, the sample rate should ideally be at least 180 MSPS and as high as 250 MSPS.  These sample rates are likewise good for multi-carrier digital pre-distortion.  While this may not be a reasonable solution for many applications, many applications still find 5 to 20 MHz of spectrum quite useful to digitize with multiple carriers.  Here sample rates of 60 MSPS or more are quite realistic.  In an effort to improve noise performance, even these sample rates have crept to 90 MSPS and beyond.

 

Gain based on 900 MHz Blocking

The information above is based on the fullscales listed in the footnotes below.  Typically this is between +4 and +7.5 dBm.  The goal of the following analysis is to determine the best performance possible with this technology.  Based on the ADC fullscale data and given an in-band blocker of –13 dBm, the highest gain possible without clipping would be about 17 dB.  Given headroom and margin, this could be closer to 12 dB, a really small number to get a good NF but for this discussion a 3 dB NF will be assumed.  While the gain could be increased when input signals are low, this may not be attractive due to the possibility of dropped calls in the event of a sudden large inband blocker.  However, as a starting point for this discussion, it is assumed that a fixed gain of 12 dB is used. 

 

Optimistic sensitivity at 900 MHz

Under these stated conditions, front-end noise presented to the ADC will be –159 dBm/Hz.  This is significantly below the ADC numbers posted above indicating that the ADC will significantly dominate receiver noise.  In non-blocking conditions, the gain should be increased to ensure that the front-end thermal noise is greater than the ADC noise per “DNL and Some of its Effects on Data Converters”[7].  Based on this, the conversion gain should be increased by about 15 dB more to 27 dB to ensure that front end thermal noise is 10 dB greater than ADC noise.  This would increase external thermal noise to about -144 dBm/Hz.  This is on par with many of the low end 14 bit converters; however, it is suitable for many of the higher performing converters such as the AD9445, AD9446 and AD6645.  While this is not necessarily a problem, ADC noise tends to not be white and therefore, some non-linearities will exist within the receiver input dynamic range if the converter is allowed to dominate the noise floor.  This is not necessarily harmonics, but could be poor estimation of input power levels due to fluctuating noise floor[8].  Ideally, the AFE noise should be just above the ADC noise.  With higher performance ADCs, the noise is about -148 dBm/Hz, therefore, the AFE noise should ideally be about –144 dBm/Hz which requires an AFE gain plus NF of 30 dB (27 dB gain, 3 dB NF).  However, under blocking conditions, the gain would need to be reduced to prevent clipping.  To achieve true multi-carrier performance, the ADC SNR should be improved instead of changing the gain.  Implementing an AGC increases the risk of dropped calls.  Therefore, with a fixed fullscale for the converter, the noise floor should be reduced by 15 dB instead of increasing the conversion gain.  This would result in ADC SNR requirements of close to 86 dB.  From an SNR perspective, this would enable multi-carrier GSM performance in the 900 MHz band.  Under this condition, a receiver could simultaneously process a signal at -13 dBm and about -110 dBm[9] which is the typical GSM reference sensitivity.  One point of uncertainty for multi-carrier GSM receivers is the necessity of operation in this condition.  Since blocking performance is usually rated at 20 dB above reference sensitivity, a more realistic range would be -13 dBm to -90 dBm.  Under such conditions other optimizations could take place and this should be the subject of many discussions.  Another possibility would be to increase the input range of the converter by more heavily terminating the ADC input.  This would allow for more conversion gain at the expense of increased IP3 performance.  While current ADC performance fails to meet the 86 dB requirements for 900 MHz band deployment, performance is increasing and should support the required noise spectral density in the next 3 years.  A final note on SNR is that in applications where performance does not need to meet the 900 MHz levels (1800 MHz & 1900 MH), existing ADC technology (mid 70’s for SNR) exists and can be deployed.

 

Optimistic blocking at 900 MHz

A signal at -13 dBm could produce a spurious in the ADC that behaves as a co-channel interferer.  In this case, the spurious should be 9 dB lower than the desired sensitivity to prevent co-channel blocking.  As mentioned above, a subject for discussion would be the necessity for meeting both -13 dBm tolerance in the presence of a signal at or near the reference sensitivity, either the required level of -104 dBm or the typical of about -110 dBm.  However, assuming the required level of -104 dBm, the spurious that could be tolerated must be 9 dB lower or -113 dBm.  Therefore, the spurious requirements of the receiver should be 100 dB total.  In order for the ADC not to take the entire budget, a more realistic number should be about -106 dB.  Additionally, if the reference sensitivity of -110 dBm is used, another 6 dB would be required to achieve this.  Clearly ADC technology is not at this level of performance. 

 

An interesting side note is that while converter performance with un-modulated tones (CW) does limit converter performance, converter performance with modulated signals is significantly better.  The figure below shows performance with single and multi-carrier EDGE application.  For deployment in bands where CW tones do not exist, spurious performance may well be achieved.  The figures below show the same 14 bit converter with a CW tone, a single EDGE carrier and 2 EDGE carriers.  In all 3 cases, the peak input drive level was about .5 dB below fullscale.  In the case of the CW tone, the SFDR is about -90 dBc.  In the single EDGE case, performance is now about -120 dBc remembering that the EDGE power is still fullscale even though it has been distributed across about 200 kHz.  Finally for the 2 EDGE case, spurious performance is even better, limited almost entirely by the noise floor of the converter.  Multi-carrier EDGE has been demonstrated to be even better.  Similar performance can be achieved with WCDMA, CDMA2000 and WiMAX waveforms however, it should at all times be remembered that in the presence of CW blockers performance will be limited by those waveforms.

 

14 bit ADC driven with CW tone                              14 bit ADC driven with 1 EDGE Carrier

14 bit ADC driven with 2 EDGE Carriers

 

As shown here, spurious performance with modulated waveforms is significantly better than with CW tones.  As stated earlier, in applications that can avoid CW tones, performance is coming into line with the required performance.  However, as with SNR, SFDR requirements for non-900 MHz applications are relaxed by 10 or more dB.  Therefore, current technology exists, even for CW tone tolerance in these bands. 

 

Demonstrating Performance with Models

While the plots above were measured on real hardware, ADIsimADC™ models correlate quite well with the devices reviewed.  Therefore, this data may be duplicated by the end user to demonstrate typical performance for this application.

 

Gain based on 1800 MHz Blocking

For operation in this band, the largest in-band blocker is –23 dBm.  The highest gain possible is now increased to 27.8 dB.  Given headroom and margin, a good number to use for gain would be 22 dB and the noise figure of 3 dB could be used. 

 

Optimistic sensitivity at 1800 MHz

Front-end noise presented to the ADC will be –149 dBm/Hz.  This is in good shape relative to the ADC and therefore is acceptable.  If the ADC noise is white in nature, this may perhaps be tolerable especially if techniques such as dithering are used.  Given that nearly 6 dB of headroom has been used, some of this may carefully be traded off to achieve a slightly higher conversion gain and even better performance.  Therefore, it may be possible to manage receiver gain in such a way that the converter neither clips and non-blocking sensitivity is maximized while not allowing the ADC noise floor to over contribute to the noise floor.  For this case, assume a gain of as much as 28 dB.  In this case, the AFE noise will be about -90 dBm in a 200 kHz bandwidth.  If an SNR of 5 dB is required then total signal power at the ADC would need to be about -85 dBm or referenced to the antenna about -113 dBm.  Therefore, for the 1800 MHz band, it is possible to meet the requirements given current ADC SNR performance.

 

Optimistic blocking at 1800 MHz

With an in-band signal of -23 dBm and a reference sensitivity of -104 dBm, the required spurious performance for the receiver would be -90 dB.  Again allowing a split between AFE and the ADC, this would require the ADC to be -96 dBFS.  This again is achievable with current technology, especially in light of the discussion above on performance of the ADC with modulated inputs.  However, if the lower reference sensitivity is required in the presence of the larger blocker, this requirement becomes more difficult to achieve and should be a point of discussion.

 

Conclusion

Based on this overview, 900 MHz is still not feasible from an ADC perspective for both SNR and SFDR but is seen to change in the near future.  Performance at 1800/1900 MHz is possible based on the discussion above.  This includes a balanced view of premium sensitivity (-110 dBm) and blocker tolerance as long as conversion gain and NF are appropriately balanced.  In order to achieve 900 MHz operation, an SNR in the mid-80’s is required and a spurious of between 100 and 110 dBFS are required.


 

[1] 117 MSPS

[2] 117 MSPS

[3] 91 MSPS and a fullscale of 3 Vpp into 200 ohms (+7.5 dBm)

[4] Measured over a 10 MHz bandwidth

[5] 104 MSPS

[6] 65 MSPS

[7] June 2001, Wireless Design and Development.

[8] This could also mean reduced or fluctuating sensitivity due to increased and fluctuating noise floor.

[9] Reference sensitivity is estimated by adding the front-end noise to the converter noise (both -159 dBm/Hz) and then integrating over a 200 kHz channel.  This is a noise power of -103 dBm.  It is assumed that a signal 5 dB larger than the noise could be processed -98 dBm.  Referenced to the antenna this would be -110 dBm.