© 2008 Brad Brannon, Analog Devices, Inc.
Abstract: Improvements in both mixed signal and digital technology have opened up many new possibilities in the design of cellular basestations for voice and data applications. These improvements allow new and novel architectures that offer great flexibility. This session will discuss wireless architectures suitable for software defined radios and the pros and cons of their implementation. Key areas of discussion will be on data converters, their specifications and limitations.
Traditional Architecture
For the better part of the last 100 years, radio architectures have remained un-changed. The workhorse of the radio has been the super-heterodyne architecture. Other architectures have come and gone, but the super-heterodyne has stayed with us. Over the last 40 years, we have seen the active elements change from the vacuum tube, to transistor to complex integrated circuits. Now we are seeing evolution of semiconductor processes, moving from silicon bipolar and CMOS to GaAs and even SiGe. Still, the super-heterodyne has stayed with us through each generation. As we move to newer processes and higher levels of integration, the super-heterodyne continues to prevail in many areas.

Traditional Receiver Architecture with analog detection
This type radio has remained with good reason. The super-heterodyne offers consistent performance across a wide band of frequencies. This is due to the fact that the actual detection occurs at one frequency regardless of the desired carrier frequency. Therefore, the detector itself does not have to operate directly at the RF frequency of interest unlike other architectures.
As transistors and integrated circuit radios came on the scene, the architecture adapted readily to those technologies, as it continues to do so today. As air standards became more complicated in an effort to increase information rate as well as improve reliability, the detectors became more complicated and eventually were replaced with analog to digital converters. The purpose of the converters is to digitize the complex waveform so that a DSP or ASIC can perform the demodulation. Often two ADCs are used to quadrature signals to extract the I and Q signal components for processing.
Traditional
Receiver Architecture with digital detection
Many other architectures exist, including software defined radios, that lend themselves to more flexibility and robustness. Often, these include wideband or IF sampling data converters. These offer many interesting possibilities not possible with direct traditional implemention. This includes the ability to digital tune and filter the channel of interest. It is often desireable to optimize the channel filter to the current signal conditions. This can not be done with a fixed ceramic filter found in tradional receiver architectures. Instead, the channel filter can be replaced with a FIR (finit impulse response) filter that can be programmed as needed, thereby constantly optimizing receiver performance.

Since these converters are used to sample signals at very low frequencies (baseband), dynamic converter performance is not especially critical. As long as the converter meets the static requirements to achieve sensitivity, the converter will work fine. This is true because converter limitations occur as the input frequencies increase. Since the main frequency components of this system are at baseband (DC) or very low frequency, these converters are not stressed. However, with the signal component at DC, specifications such as gain and offset are particularly important. For example, if a baseband converter has a large DC offset, this would appear as an un-modulated carrier directly on top of the signal of interest. If the signal is large enough, it could completely block the desired carrier.
Likewise, specifications such as INL and DNL of data converters can also limit the performance of a receiver. Normally, DNL is considered to contribute to the quantization noise of the ADC. However, at very small signal levels (at or near the reference sensitivity of the receiver), DNL errors can result in apparent gain errors within the ADC resulting in errors as much as 6 dB. As can be seen in the diagram below, the ‘short’ codes result in the ADC generating too many digital codes for the specified input.

Gain errors that result from DNL errors
Once the signal has been digitized, the signal can be demodulated in many different manners. Additionally, as the modulation standards change, the DSP program can be updated. This can be seen in the case of half rate GSM or changes in the audio codec. While these are simple examples of software updates, they are not examples of software-defined radio but do begin to hint at what software defined radio can offer. While the DSP program can be changed, the RF channel is not free to be changed since the channel filters are part of the analog components. True software defines radios required that the channel bandwidth be changed.
IF Sampling
Although one of the benefits of the super-heterodyne is that all RF signals are converted to a single low frequency where detection can easily be done, it does require a significant amount of hardware to convert the RF signals down to the detection frequency. In the example above, three down conversions are required. However, if circuitry can be fabricated such that the detection could occur at a higher frequency, some of the down conversion stages could be eliminated. Ideally, direct RF detection would be ideal, eliminating all down conversions. While this is a worthy goal, consistent performance would be very difficult to achieve. As a compromise, the analog to digital converters may sample the first IF signals.
Single
Carrier IF Sampling
For IF sampling applications, the first IF’s are typically found between 70 and 250 MHz. Typically 2G, 2.5G and 3G applications all have their IF frequencies in this range. While the baseband ADC’s from the previous application can be low cost, low power, low sample rate devices, the ADC’s used for IF sampling are quite different. They feature fast clocking rates and very wide input bandwidths. While baseband ADCs are often optimized for low frequency performance with the use of a low pass filter to remove excess noise, IF sampling systems cannot afford this luxury. Here, noise is often reduced by taking advantage of oversampling and digital filtering. By running a very high clock rate relative to the actual signal bandwidth the noise can be reduced by a process called processing gain. In systems that take advantage of oversampling followed by digital filtering, the apparent SNR of the ADC can be improved by many dB.
For example, if the ADC is sampling a signal at 65 MSPS and the actual bandwidth is only 200 kHz, the possible ADC SNR improvement is:
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Signal plots both before and after digital filtering.
Oversampling with digital filtering gives processing gain. The improvement in SNR is due to the removal of excess noise and signals.
Processing Gain is only possible with the use oversampling and a Receive Signal Processor type function. Receive Signal Processors are a generic type of digital integrated circuit that process digital data from an ADC to tune the carrier frequency, perform channel filtering and reduce the data rate. These may be implemented in many different technologies.

Typical Receive Signal Processor Block Diagram
The Receive Signal Processor (RSP) is not unlike the analog down converter stages that it replaced. A closer inspection reveals a digital local oscillator followed a quadrature demodulator and several filter stages. There are significant differences. First, this is a digital circuit and is therefore identical from one die to the other, eliminating alignment and tweaking. Second, since it is digital, it may be programmed. Not only can the local oscillator be tuned, but also the filter bandwidths can be changed, making this device an ideal candidate for software-defined radio.
In this architecture, if channel filters 1 and 2 are replaced with filters that prevent aliasing within the data converter, then the channel bandwidth is not constrained in the analog domain and can therefore be changed in the digital domain. The RSP is then responsible for channel filtering and rejection of the remaining signals in band. This therefore is a first step towards software-defined radio. In this architecture, the bandwidth, data rate and demodulation method can all be changed, desired characteristics for software defined radios.
In this architecture, the ADC is key to success. While baseband ADCs need not function at high analog input frequencies, this is the norm for this architecture. Therefore these converters must have very wide analog input bandwidth. In addition to bandwidth, the converters must have good spurious performance. Since there are no analog channel filters, it is possible that a spurious signal generated by an undesired signal may fall into the frequency of interest. If this happens, the channel may be blocked. Therefore, the spurious performance must be such that any spurs generated are smaller than the desired signals of interest.
In the IF sampling spectrum shown below, very little of the adjacent channel signals are removed with the analog filters. It is the responsibility of the digital filtering from the RSP to remove the un-desired signals. Undesired signals generated within the ADC may be difficult to filter.

Sloppy IF
IF Sampling Multi-Carrier
In the previous example, IF sampling was used to eliminate down conversion stages. There we saw that if the channel filters were relaxed, channel characteristics could be set digitally within the RSP. If the channel filter is further adjusted to provide entire band selection, entire service bands can be digitized. By doing so, it is possible to digitize an entire service band.

Multi-carrier IF sampling
Once digitized, the entire band can be tuned and filtered as desired. In this manner, channel selection, matched filtering, data rate and demodulation standard can all be configured through software, provided a firm beginning for a software defined radio platform.
Digitizing wide signal bandwidths can prove to be quite challenging for data converters. In doing so, spurious performance is very critical. Unlike single carrier IF sampling, entire signal bands are digitized, thus allowing potentially many hundreds of signals to be digitized. It is very important that the converter not generate spurious signals that interferer with the desired signals. These spurious can be in the form of harmonics or intermodulation products. Either way, the results could be poor performance of the receiver.

Multi-Carrier WB-CDMA example
Software Defined Architecture
Therefore, as laid out here, a software-defined radio is one that has the flexibility to tune, filter, set the data rate and control the modulation type through software. The real limitations to these types of systems are the data converters. The back end digital processing can be implemented in many different manners. The analog front end while challenging, it is not impossible. However, the most critical performer in the system is the data converter. The entire fidelity of the receiver depends solely on this one component. Selected properly and they can solve many problems. Selected improperly and the receiver will not function as desired.
Contact information
Brad Brannon
Systems Applications Engineer
Analog Devices
7910 Triad Center Drive
Greensboro, NC 27410 USA
Phone: (336) 605-4212
Email: brad.brannon@analog.com