ADC Noise Contribution in cascaded systems

Introduction

The introduction of fast, inexpensive digital signal processors (DSP) technology, has allowed them to find applications into areas that were once dominated by analog circuitry. Today, DSP’s are often used in place of mixers, oscillators, filters and detectors of analog signals of all types as well as in areas not possible to implement in the analog domain. This of course has caused a collateral increase in the demand and usage of analog to digital converters (ADC) as well. Once an analog signal has been digitized, all varieties of manipulation may be performed in the digital domain. Interestingly enough, in the digital domain if enough bit precision is thrown at the math, the manipulations can be largely noiseless and perfectly linear! Most DSPs are capable of scalability such that they can be used in such a manner as to infinitely add bit precision. Of course there is a penalty of execution speed so some limitations do apply. However, the same is not true for ADC technology. Although over the last few years, ADC technology has grown significantly, bit precision of data converters has remained fairly low for the faster conversion rates. Of course Sigma-Delta (SD) technology has provided a significant boost to converter precision, but at a direct tradeoff to conversion rate, thereby directly trading off bit precision for speed. Perhaps next generation SD technology will solve this problem, but with current systems, effective ADC bit precision is often the bottle neck in a system design. Since bit precision of the digital signal processing can be made arbitrarily large, once the signal has been digitized, no other noise sources need be considered.

The purpose of this article is to help the reader understand various techniques for determining the performance limitations of a selected ADC on a system or conversely the bit precision requirements of an ADC for a specified system.

Common Grounds

There are several figures of merit that are often assigned to data converters. The two most popular are signal to noise ratio (SNR) and effective number of bits (ENOB). Of the two, the SNR is the most useful measurement. However, given one, the other can be easily determined. Although the correct method for determining ENOB is through the use of the sinewave curvefit, a quick approximation of ENOB can be determined with the following equations¹.

The preferred figure of merit is SNR. For an ADC, SNR is defined as the log ratio of signal energy to the noise energy. This measurement is usually made in the frequency domain utilizing an FFT. From the spectral information, the fundamental is located by sorting through the FFT bins to determine which bin has the largest energy content. Because of spectral leakage associated with windowing and other numerical artifacts, the energy in several adjacent bins around the main signal bin are usually added together to determine the total signal energy. The remaining energy not counted as signal, is technically considered noise. There are two exceptions. First the energy at DC is usually not counted as noise because most converters have a fairly high DC offset and in a general sense, no information is carried at DC (this is not always true, but for AC coupled systems, it is generally considered correct). Second, often harmonic energy is separated from the remainder of the noise. For many applications, it may be acceptable to include harmonics with noise, in others, they are omitted and considered separately. For this discussion, the harmonics are considered part of the noise. Therefore, total noise energy is the summation of all non-signal FFT bins, except for DC. From the FFT bin summation, the SNR may be calculated by the equation below.

Most ADC manufacturers do an adequate job specifying the SNR performance of their products either directly though tables or through graphs. So it should be only necessary to study the product data sheet to determine the SNR performance. If this information is missing or not for the correct test conditions, SNR can easily be measured for most data converters using products such as the High-Speed ADC FIFO Evaluation Kit available from Analog Devices. This simple board connects easily to a wide variety of data converters and easily interfaces to a standard PC through the printer port. The evaluation board includes the software to capture and measure data converter performance and was used for the data shown above. No matter how it is determined, once the SNR is known the various noise models are easy to determine.

Input Referred Noise Voltage

The simplest and most common method of including ADC performance in overall system analysis is by using the ADC’s input referred noise voltage. If this can be determined, it can then be added to the noise cascaded from earlier stages of the circuit. Since it is assumed that no additional noise will be added by the DSP, all of the noise can be referenced to the input of the ADC where all calculations will be made.

Derivation

As with all ADC noise examples, the SNR must be known. Additionally, the fullscale voltage of the data converter must also be known. As with SNR, this is usually taken directly from the data sheet, but can also be measured by the application of test voltages to the input of the data converter that causes a fullscale indication.

With knowledge of SNR and the fullscale of the converter, the input referred noise voltage can be determined. The equation shown above for SNR is determined by examining the power within the spectral bins. However, an equally valid equation exists based on voltages.

This equation can easily be solved for the input noise as shown.

If the input signal for the SNR measurement is fullscale then the fullscale of the data converter can be substituted in this equation. Normally, noise is measured in rms volts, but fullscale is measured in peak to peak. Therefore, the input range must be appropriately scaled to rms, to produce noise rms. Otherwise, the noise voltage will be peak to peak and have only limited usefulness. Thus the following equation accounts for the fullscale range of the converter and ensures that noise is determined in rms instead of peak to peak.

As an example, given an SNR of 78 dB and a fullscale range of 2 volts, the noise is 89.02 uV rms.

Application

In the diagram below, the front end noise up to the data converter has been determined and is as shown. Likewise the noise from the ADC is given as determined above.

As shown in this diagram, the noise from the front portion of the circuit is determined to be 120 uV rms and the back end is determined to be 89.02 uV rms. Since these voltages are not correlated, they can be added by the square root of the sum of the squares.

Evaluation of this expression shows that the total noise voltage on the input to the ADC is 149.41 uV rms.

Input Referred Noise Figure

Another common use for ADCs is within radio architectures. Radio designers like to work with noise figures (NF). While data converters are not power devices as the use of NF implies, an equivalent NF can be computed for a data converter. Once this number is established, it may be used in computing the cascaded performance of a receiver strip, just as amplifiers, mixers and filters may be. NF is easily used with noise density per Hertz and has an advantage over the noise voltage method above. The noise voltage method assumes total integrated noise. When dealing with bandwidths that are smaller than Nyquist, the noise voltage must be scaled appropriately. Conversely, the NF method can easily be used with any bandwidth required as shown below.

Derivation

Noise figure ‘NF’ is a figure of merit used to describe how much noise is added to a signal in the signal chain of a radio (or other low noise signal chain). Usually it is specified in dB although in the computation of noise figure, the numerical ratio (non-log) is used. The non-log value is called noise factor and is denoted by ‘F’ and is defined below.

Since SNR is defined as the ratio of and since an ADC does not provide any gain (just numerical quantization), the output signal is the same as the input signal plus the quantization noise. With this in mind, the equation can be rewritten as:

Converting this to log form and at the same time converting to a common reference such as dBm gives the equation:

Although NF is not normally associated with a data converter, it can be calculated for a single set of operating conditions. If these are changed, the number is invalidated and must be recalculated. Specifically, the following must be known: SNR, sample rate, input voltage range and input termination impedance (including both internal and external loading). Given this information along with operational temperature, NF can be determined.

From the noise factor equation above, F, is based on the ratio of output noise to input noise, the input noise is simply ‘kT’ noise. Output noise for all realizable ADCs is limited by its SNR performance. The most appropriate method is therefore by comparing the noise density of the selected data converter with that of thermal noise. Therefore, the noise spectral density of the data converter must be determined. This can be determined by the following equation².

This equation provides the equivalent input referred ADC thermal noise in dBm/Hz. Since a data converter has no gain, only quantization as stated above, the noise on the output also consists of input noise. When using the SNR term to compute output noise, it also includes the effects of input noise. Thus ADC SNR includes Output noise and input noise.

To determine the input thermal noise input to the ADC, the equation below can be used.

where k is Boltzmann’s constant, T is absolute temperature and B is bandwidth (1 Hz in this application). Therefore, in this application, thermal noise in 1 Hertz is –174 dBm/Hz.

Given an ADC with a fullscale input power of +4 dBm, a sample rate of 80 MSPS and an SNR of 78 dB, the noise spectral density of the ADC is then –150 dBm/Hz. Using the equation above, NF is then the output noise less the input noise or 24 dB in this example.

Application

In the radio signal chain below, the same block diagram is examined. However, in this example, the noise figure of the system will be analyzed. Given the same ADC operating characteristics as defined above, the noise figure is 24 dB.

Working with cascaded noise figures requires a little more math, but the equations are fairly simple. The following equation can be expanded for any number of required stages²:

In the equation above, the ‘F’ represents the noise factor (non-log) stage noise and the ‘G’ represents the non-log gain of the numbered stages. In this example, there are only two stages, therefore, the equation simplifies to:

In the simple figure above, F₁ is 4.467, G₁ is 100 and F₂ is 251.2. Substituting these into the equation above gives:

Expressed in log format gives a total cascaded noise figure of 8.4 dB.

How many bits does it take

One of the most common questions asked about data converters is “How many bits do I need?”. Armed with the discussion above and knowledge about the signal being digitized, this can be determined.

They key is the spectral density of the desired signal. A good working knowledge of the desired signal is important. Often times, this signal can be modeled as a simple sinusoid, other time; it may be modeled as Gausian noise with a specified bandwidth.

As an example, consider a CDMA2000 signal with a power level into the data converter of –87 dBm spread across 1.25 MHz. The spectral density of this signal is:

which evaluates to –148 dBm/Hz. Because of the strong abilities of CDMA to correlate a signal with a poor SNR, an SNR of about –20 dB is required to recover the signal. Thus for this example, the noise spectral density of the signal chain could be as high as –128 dBm. Although data converters are generally assumed to have a ‘white’ noise floor, this is not always the case. To prevent the ADC from adding un-necessary spurious content (especially at low signal levels), it is ideal if the ADC noise floor is about 10 dB below the overall noise level. While this may not always be possible, this should be a goal. Often times a compromise will be made. In this example, the ADC noise floor will be placed 5 dB below the overall thermal noise. This compromise will prevent the ADC from dominating the noise, while at the same time prevent over specifying of the ADC.

Since it is assumed that the noise floor of an ADC is uniform, the integration of this noise across the Nyquist band of the ADC will provide the total noise on the output of the ADC. If the sample rate for the ADC is 61.44 MHz, the noise floor is integrated across the Nyquist band of 30.72 MHz. This gives a noise spectral density of:

which evaluates to –58.1 dBm. If the fullscale of the ADC is +5 dBm, then the required single tone SNR is 63.1 dB. From the equation presented earlier, this is an ENOB of 10.2 bits.

Conclusion

Both analysis methods presented above have their uses and limitations. The choice of strategies will depend on the end application. No matter the system designing for, one key facet is that the ADC noise not be allowed to dominate overall noise³. The implication is that other active and passive devices limit noise. The common assumption about data converters is that spectral noise is ‘white’, but in fact, the ADC noise spectrum is not white. This is especially true at low signal levels (when small signals are of interest). Fortunately, where this is the case, it is often advantageous to introduce dither into the system to ‘whiten’ up the ADC spectrum⁴.

References

Brannon, Brad, "Calculate an ADC's Effective Bits," Test & Measurement World, May, 1996, pg 17.
Brannon, Brad, “Digital-Radio-Receiver Design require re-evaluation of parameters,” EDN, November 5, 1998, pgs 163-170.
Brannon, Brad, “DNL and Some of its Effects on Converter Performance,” Wireless Design & Development, June 2001, pg 11.
Brannon, Brad, “Overcoming Converter Nonlinearities with Dither”, Analog Devices Applications Note AN-410, www.analog.com, December 1995.